Features The storage register transfers data to the output buffer when shift-register clear (SRCLR) is high. 1• Low rDS(on),5 Ω (Typical) When SRCLR is low, the input shift register is • Avalanche Energy, 30 mJ cleared. When output enable (G) is held high, all data • Eight Power DMOS Transistor Outputs of 150-mA in the output buffers is held low and all drain outputs Continuous Current are off. When G is held low, data from the storage register is transparent to the output buffers. When • Output Clamp Voltage, 50 V data in the output buffers is low, the DMOS-transistor • Devices are Cascadable outputs are off. When data is high, the DMOS • Low-Power Consumption transistor outputs have sink-current capability. The serial output (SER OUT) allows for cascading of the 2 Applications data from the shift register to additional devices. • Instrumentation Clusters Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous • Tell-Tale Lamps sink-current capability. Each output provides a 500- • LED Illumination and Controls mA typical current limit at TC = 25°C. The current limit • Automotive Relay or Solenoids Drivers decreases as the junction temperature increases for additional device protection. 3 Description The TPIC6B595 is characterized for operation over The TPIC6B595 device is a monolithic, high-voltage, the operating case temperature range of −40°C to medium-current power 8-bit shift register designed for 125°C. use in systems that require relatively high load power. The device contains a built-in voltage clamp on the Device Information(1) outputs for inductive transient protection. Power PART NUMBER PACKAGE BODY SIZE (NOM) driver applications include relays, solenoids, and SOIC (20) 12.80 mm × 7.50 mm other medium current or high-voltage loads. TPIC6B595 PDIP (20) 24.33 mm × 6.35 mm This device contains an 8-bit serial-in, parallel-out (1) For all available packages, see the orderable addendum at shift register that feeds an 8-bit D-type storage the end of the data sheet. register. Data transfers through the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively.